VM SPOOL question

[Anne & Lynn Wheeler]

for a little drift ... also as an undergraduate i complete redid the
page replacement algorithm ... implementing global LRU based on page
reference bits ... lots of past postings discussing page replacement
algorithms
http://www.garlic.com/~lynn/subtopic.html#wsclock

for additional drift ... another old email mentioning page replacement
work:

From: wheeler
Date: 6/22/92 19:57:09

Last year there was some sort of announcement from Amdahl regarding
Huron ... describing it as a hierarchical database system ... part of
something look like it was targeted along the same lines as ad/cycle.

at a meeting in boston on friday, i ran into consultant/professor (who
i had known from the early '70s) that mentioned he had designed the
Huron database system and was working with amdahl on the
implementation.

the actual context of the discussion started out on LRU replacement
algorithms and a paper he and two other professors were writting on
the subject. I had been responsible for possible the original
implementation of "clock" algorithm in the late '60s (which he had
known). the point of the discussion was that i had also developed a
different class of LRU replacement algorithms during the early 70s
that had some interesting advantages over clock. specifically both
"clock" and this hybrid are approximations to a "true" LRU replacement
(i.e. the time of the most recent reference to every object in memory
could be exactly determined ... and all the objects could be exactly
ordered by the exact/true reference information).

Doing detailed trace-driven simulation studies, "clock" would be
measured as coming within X% (where X is typically in the 2-10 range)
of the performance of true LRU (i.e. almost as good as). The
interesting thing about the hybrid was that it was possible to find a
version of the hybrid that was 5-10% better than true LRU.

In any case, he had thought that his work on LRU "clock" like
replacement algorithms could significantly improve the performance of
the Huron buffer cache manager. He had forgotten about this other work
I had done on hybrid replacement algorithm. In any case, he became
interested in whether I would review and/or even possibly contribute
to the paper.

As to Huron database, he said that it was NOT a hiearchicial
implementation and had asked Amdahl to not describe it as such. Some
of the details sounds something like what Atherton went thru starting
with a RDBMS and then evolving to a RYO for unstructured real-world
data. Claim is that Huron can handle relational queries but also
maintains order (w/o having to sort on sequence field ... especially
evolving mega-entries) and can do direct links (w/o join overhead), as
well as not having to recompile apps when schemas change.

In any case, is there anybody out there that already has detailed
description of Huron database implementation?

... snip ...

[CBFalconer]

Anne & Lynn Wheeler wrote:
... snip ...

Post by Anne & Lynn Wheeler
for additional drift ... another old email mentioning page replacement
From: wheeler
Date: 6/22/92 19:57:09
Last year there was some sort of announcement from Amdahl regarding
Huron ... describing it as a hierarchical database system ... part of
something look like it was targeted along the same lines as ad/cycle.

... snip ...

Post by Anne & Lynn Wheeler
In any case, he had thought that his work on LRU "clock" like
replacement algorithms could significantly improve the performance of
the Huron buffer cache manager. He had forgotten about this other work
I had done on hybrid replacement algorithm. In any case, he became
interested in whether I would review and/or even possibly contribute
to the paper.

Back in the late 70s I developed an algorithm which gave, IMO,
significant advantages. Basically, use of a segment set the high
order bit in a used byte. Each timing cycle, which was based on
counts of intersegment transfers, all segments had their used bytes
shifted right. When segment replacement was desired the system
selected the one with the smallest used byte. This could run on
systems with no real timers, i.e. microprocessors such as the 8080,
and was used to control interpreted position independent pcode
segments. It functioned quite well, and allowed a very small
portion of the actual code to be in memory at one time by retaining
the history for a significant period.